ZIB, ParTec and Next Silicon AMD, and pro-com are excited to invite you to the upcoming technical Accelerator Hackathon.

Join us in this 1.5 day hackathon to learn about the exciting new HPC approach from NextSilicon. This deep dive covers the programming environment, profiling analysis and optimization approach with dedicated hands-on sessions to allow participants to experience this novel hardware directly.

Workshop AMD partition.

NHR@ZIB operates HPC system Lise consisting of partitions. Each partition is a separate compute cluster offering specific hardware. The CPU Genoa partition has been installed in October 2024. The aim of the workshop is to present the specific properties of the CPU hardware from AMD.

• Date
  • July 15th 2025
  • morning session 09:00-12:00 
  • afternoon session 13:00-16:00
    
    
• Location:  onlineZuse Institute Berlin (ZIB), Takustr. 7, 14195 Berlin, Germany
• For questions please send an e-mail to event@nhr.zib.de.

Registration

Due to limited capacity, we would ask you to RSVP until 14th March 2024 by sending an email to event@nhr.zib.de.

Once we receive your registration, the team at ZIB will be in touch regarding the next steps.
Please be aware that in order to participate in the event, you will need to sign an NDA.

Organization

• As this event will be hands-on, please ensure that you bring your own laptop.
• Event location: Zuse Institute Berlin, seminar room
  • How to get to ZIB: see www.zib.de/contact
• HowTo: Activate workshop account and log in to NGT, section Dataflow Engine hardware accelerator on webpage Next-Gen Technology Pool